Logic minimization algorithms for VLSI synthesis

Author Statement

by Robert K. Brayton ... [et al.]

Publication

Kluwer Academic Publishers

Publication Year

c1984

Collation

ix, 192 p. : ill. ; 25 cm

Series

The Kluwer international series in engineering and computer science ; SECS 2. VLSI, computer architecture, and digital signal processing.

Subject

Logic design,Integrated circuits -- Very large scale integration,Integrated circuits -- Design and construction -- Data processing,Algorithms

ADDED ENTRIES

Brayton, Robert King,Title: Logic minimization algorithms for V.L.S.I. synthesis

Holding Info.

0898381649

Original By

76/06

DocumentNumber

2139

Index

Includes index.

Biblography

Bibliography: p. [174]-190.

Link To Document