• RecordNumber
    48930
  • LC Class
    TK
  • LC Number
    7874.65
  • LC CutterNumber
    .E36
  • LC Date
    2008
  • Author

    Edlund, Greg

  • Title

    Timing analysis and simulation for signal integrity engineers

  • Author Statement
    Greg Edlund
  • Publication
    Prentice Hall
  • Publication Year
    c2008
  • Collation
    xx, 241 p.: ill., 25 cm
  • Series
    Prentice Hall modern semiconductor design series
  • Subject

    Timing circuits , Digital electronics , Signal processing , Signal integrity (Electronics)

  • تاريخ ورود اطلاعات
    1388/07/05
  • Index
    Includes bibliographical references (p. 233-234) and index.
    • Link To Document
    https://library.iut.ac.ir/dl/search/default.aspx?Term=48930&Field=0&DTC=100