پديد آورنده :
بنيادي، مرضيه
عنوان :
مطالعه روشهاي تشخيص عمق با استفاده از تصاوير استريو و پيادهسازي سختافزاري يك نمونه
مقطع تحصيلي :
كارشناسي ارشد
محل تحصيل :
اصفهان: دانشگاه صنعتي اصفهان، دانشكده برق و كامپيوتر
صفحه شمار :
ده، 103ص.: مصور، جدول، نمودار
يادداشت :
ص.ع. به فارسي و انگليسي
استاد راهنما :
مسعود سيدي
توصيفگر ها :
تشخيص عمق , تطبيق استريو , FPGA , پيادهسازي سختافزاري , پردازش تصوير , VHDL
تاريخ ورود اطلاعات :
1396/05/31
رشته تحصيلي :
برق و كامپيوتر
دانشكده :
مهندسي برق و كامپيوتر
چكيده انگليسي :
104 Study of Methods of Depth Estimation from Stereo Images and a Sample Hardware Implementation Marzieh Bonyadi Marzieh bonyadi@ec iut ac ir Date of Submission Department of Electrical and Computer Engineering Isfahan University of Technology Isfahan 84156 83111 Iran Degree M Sc Language Farsi Supervisor sayed masoud sayedi m sayedi@cc iut ac ir Abstract Depth Estimation is an important issue in Machine Vision systems that gained specialattention in navigation systems especially mobile robots surgeon robots and auto drivingcars Stereo matching is one of the depth estimation techniques that In addition to it s lowercost compared to other methods can be used in different environmental conditions indoorand outdoor Depth estimation from a stereo pair of images is done by detecting andcomparing the locations of corresponding pixels in two images This process hascomputational complexity and requires high hardware resources and memory The purpose of this thesis is to review different stereo matching methods evaluatehardware requirements of methods choose appropriate algorithm for different steps ofcalculations and present a suitable architecture design for a depth estimation system with anefficient usage of memory and hardware resources To that end first different stereomatching algorithms were assessed Then in view of hardware approach of this thesis andbased on simulation results appropriate algorithms were chosen Next an architecture designbased on selected software algorithms was proposed The bottleneck of hardware resourceswas detected and with hardware simplification with a negligible reduction in accuracy theamount of resources usage was decreased Validation of this architecture was approvedthrough the simulation Finally a complete hardware system was proposed to be used forstereo matching function As the stereo correspondence method relied on the search ofcorresponding pixels in images by using a specific geometry and a transformation of imageknown as image rectification searching space is changed from a whole two dimensionalimage to a one row of image a one dimensional space For implementation of this method anew approach was used in which calculation process was done efficiently using memoryblocks and hardware resources The whole system is implemented on a small device As theresult of simplification and along with a negligible reduction in accuracy FPGA resourceusage 21 BRAM usage 11 and register usage 18 were reduced In addition by usingpipeline technique the maximum operating frequency was increased by 75 Keywords Depth Estimation Stereo Matching FPGA Hardware Architecture Image Processing VHDL
استاد راهنما :
مسعود سيدي