طراحي، پياده‌سازي و ارزيابي شتاب‌دهنده سخت‌افزاري TSCH در فرستنده‌ گيرنده استاندارد IEEE 802.15.4

چكيده انگليسي :

Design Implementation and Evaluation of TSCH Hardware Accelerator in IEEE 802 15 4 Standard Transceiver Hamid Rahimian Kalatehbali kalatehbali@gmail com August 20 2020 Department of Electrical and Computer Engineering Isfahan University of Technology Isfahan 84156 83111 Iran Degree M Sc Language Farsi Supervisor Dr Majid Nabi nabi@iut ac ir Abstract Nowadays the internet as one of the most popular tools in the world has provided an extensive connection of resourcesdescribed as the Internet of Things IoT Wireless Sensor Networks WSNs are used as the communication network inmany applications in various domains including industrial automation smart buildings and health care These networksconsist of many wireless sensor nodes that have limitations on power consumption transmission range and form factor They are deployed in an environment to perform data processing and sensing the environment Usually these sensors arepowered by batteries It is difficult and challenging to recharge or change the batteries after they deplete The IEEE 802 15 4standard is one of the most important standards for these networks because of its low data rate low power consumption andlow cost features which could coexist in the ISM band along with other standards A node of this standard due to its lowpower and low cost features typically uses embedded processors with limitations in processing power and memory whichmakes it challenging to provide processing needs of applications with complex protocol stack If it does all the processingpower and memory would be consumed to implement the protocol stack and then there would be no resources left to runother processing needs In order to overcome these limitations the clock speed of the processor can be increased or a morepowerful processor should be used In such cases the power consumption and the cost of the node would increase greatly One of the approaches of various companies in this field such as NXP is to transfer some of the protocol stack tasks to thehardware in order to reduce the processing workload of the processor The TSCH mechanism is one of the IEEE 802 15 4 standard operating modes developed for noisy industrial environ ments It uses time slots and channel hopping to overcome the effects of multi path fading and external interference Thismechanism imposes a high workload on the processor due to its precise schedules By transferring this mechanism from thesoftware running on the micro controller to hardware processor workload could be reduced Moreover if internal networkcollisions are prevented they could lead to reduced retransmission which results in increased throughput and overall im provement in power consumption In this research two main tasks are taken into consideration First the digital basebandprocessor of IEEE 802 15 4 standard has been designed and implemented to be used as a platform for adding TSCH mecha nism Secondly TSCH mechanism has been designed and implemented in hardware to be used as an accelerator in basebandprocessors Lastly the integration of the TSCH accelerator and digital baseband processor has been synthesised in TSMC65nm technology The results include resource utilization and power consumption which contain the information needed

رحيميان كلاته‌بالي، حميد

طراحي، پياده‌سازي و ارزيابي شتاب‌دهنده سخت‌افزاري TSCH در فرستنده‌ گيرنده استاندارد IEEE 802.15.4

استاندارد IEEE 802.15.4 , شتاب‌دهنده سخت‌افزاري TSCH , اينترنت اشياء