15944

14240

كارشناسي ارشد

الكترونيك مدار مجتمع

اصفهان : دانشگاه صنعتي اصفهان

1399

نه، 81ص، : مصور، جدول، نمودار

رسول دهقاني

امير رضا احمدي مهر

مسعود سيدي، نسرين رضائي حسين آبادي

1399/08/09

كتابنامه

مهندسي برق

مهندسي برق و كامپيوتر

1399/08/10

2647449

4 2 2 بهره 06 4 2 3 عدد نويز 16 4 2 4 پايداري 26 4 2 5 ساير مشخصات تقويتكننده كم نويز طراحي شده 46 4 2 6 بررسي تغييرات دما منبع تغذيه و فرآيند بر تقويتكننده كم نويز ارائه شده 86 4 3 نتيجهگيري 57 فصل پنجم جمعبندي 77 5 1 خالصه و مقايسه نتايج 87 5 2 محدوديتها پيشنهادها 18 مراجع 28 چكيده انگليسي 78 نه

Design of low noise amplifier in the sub threshold region using gm boosting technique and forward body bias for low power applications in CMOS technology Waleed Hosseini pour September 2 2020 Department of Electrical and Computer Engineering Isfahan University of Technology Isfahan Iran Degree M Sc Language FarsiAbstractToday with advancement of industry and decreasing the size of integrated circuits demands for wirelessdata transmission has increased A telecommunication receiver is composed of different blocks amongwhich low noise amplifier LNA is more important In this thesis a LNA for low power applicationsin industrial scientific and medical ISM band is introduced The purpose of the design of this amplifieris to improve the performance and reduce its power consumption in order that it can be used in portablereceivers The proposed amplifier consists of two stages In the first stage the current reuse technique isused to reduce the power consumption of the amplifier In the second stage the gm boosting techniqueis used to increase the amplifier voltage gain The main task of the first stage is to establish an inputimpedance matching and the second stage is used to increase the required gain To reduce the powerconsumption of the proposed LNA all transistors are biased in sub threshold region Another usedtechnique is to put transistor bodies in forward biasing Using this technique the threshold voltage ofthe transistors is reduced and leading to decrease the voltage bias which can reduce the powerconsumption of the amplifier In the input impedance matching of the proposed amplifier the commonsource structure with wire bond inductor is used By using wire bond inductor the amplifier chip area isreduced and the noise associated with on chip inductor is also removed The proposed low noiseamplifier is designed and simulated in TSMC 180nm 65nm CMOS technology The LNA provides avoltage gain of 20dB with a noise figure of 6dB third order input intercept point IIP3 4 3dBm andmoreover good input impedance matching of 22dB at the operating frequency is obtained Theproposed amplifier needs 0 4 V supply voltage for biasing The power consumption is only 200uW in180nm technology and 70uW in 65nm technology Keywords Low noise amplifier low power amplifier gm boosting technique forward body biastransistor ISM band CMOS technology

رسول دهقاني

امير رضا احمدي مهر

مسعود سيدي، نسرين رضائي حسين آبادي