9316

8618

كارشناسي ارشد

برق- مخابرات

اصفهان:دانشگاه صنعتي اصفهان،دانشكده برق و كامپيوتر

1393

[سيزده]،125ص:جدول، نمودار

ص.ع.به فارسي و انگليسي

حسين سعيدي

علي قياسيان

10/9/1393

مهندسي برق و كامپيوتر

ID8618

۶ A Proposed Scheduling Algorithm in NetFPGA Reference Switch Zahra Aref z aref@ec iut ac ir Date of Submission 2014 09 15 Department of Electrical and Computer Engineering Isfahan University of Technology Isfahan 84156 83111 Iran Degree M Sc Language FarsiSupervisor Hossein Saidi hsaidi @cc iut ac irAbstractSoftware Defined Networking SDN is recently introduced in networking history whichhas more adaptability in compare to traditional data networking NetFPGA is an openplatform enabling researchers and instructors to build high speed hardware acceleratednetworking systems NetFPGA has four ports and it can be defined as a switch In a certainperiod of time it might be more than one packet for a specific output port or multiplepackets for multiple output switches therefore it is necessary to have a scheduling systemfor transferring packets Based on available anticipated ports the scheduling system willselect one of the packets utilizing these criteria and transfer it to the desired outputs Oneof the main purposes of the scheduling algorithm is to optimize and reduce the latency ofpackets The switch performance depends on two factors the scheduling algorithm and theincoming switch traffics Many of the applied programs employ various traffic classes withdifferent prioritize levels A prioritize algorithm gives the highest priority in a certainperiod to the most necessary request In this thesis the Round Robin scheduling algorithmon output ports of NetFPGA reference switch is modified to a prioritizing algorithm Therefore by prioritizing real time traffics against non real time traffics by SRAM staticand linked list allocation the design reduced delay of real time packets versus non real time ones with no packet loss SRAM Linked list allocation illustrates more efficient useof SRAM when increasing priorities The proposed scheduling algorithm has beensimulated in NetFPGA platforms and is implemented and examined in practical cases Keywords NetFPGA packet scheduling algorithm real time packet linked list

حسين سعيدي

علي قياسيان