In recent years, the use of memristors as an emerging element in the hardware implementation of neural networks—particularly convolutional neural networks (CNNs)—has attracted significant attention. Memristor features such as resistive storage capability an‎d low power consumption make it a suitable can‎didate for accelerating convolutional computations. However, in practice, challenges such as voltage dro‎ps across transmission gates hinder the accurate measurement of output voltages in the columns of crossbar arrays. This leads to errors in determining memristor resistance an‎d ultimately reduces the accuracy of convolutional layers. In this study, after reviewing the theoretical foundations of neural networks an‎d memristors, an algorithmic method is proposed to compensate for the error caused by voltage dro‎ps in transmission gates during the implementation of convolutional layers. The proposed method accounts for the voltage dro‎p in computations an‎d compensates for it in software, without the need for any new circuit design. Although this approach results in a relative increase in training time, it significantly improves the accuracy of convolutional networks. For eva‎luation, a memristor model was developed using Verilog-A in the Cadence environment. A 3×3 convolution kernel was then implemented an‎d trained, an‎d the results were compared with an‎d without the proposed method. The trained weights were transferred to MATLAB an‎d used in a larger convolutional network to assess the impact of the proposed method on overall network accuracy. Preliminary results show that the proposed method effectively compensates for the accuracy degradation caused by voltage dro‎ps in transmission gates within convolutional layers. This research can be a significant step toward improving the performance an‎d applicability of memristive convolutional neural networks in the fields of image processing an‎d deep learning

مسعود سيدي

رسول دهقاني , محمدرضا احمدزاده