طراحي و پياده سازي سخت افزاري تبديل Contourlet

چكيده انگليسي :

Hardware Implementation of Contourlet Transform Seyed Mohammad Ali Zeinolabedin smaz electronic@yahoo com 2010 03 16 Department of Electrical and Computer Engineering Isfahan University of Technology Isfahan 84156 83111 Iran Degree M Sc language Persian S Samavi samavi96@cc iut ac ir M Omoomi momoomi@cc iut ac irAbstract Undoubtedly an important tool in digital signal processing is the use of transform methods There arevarious transforms that help the extraction of considerable amount of information from a signal Usually theobtained information could not be detected in the spatial or time domains Thus basic transforms onlyunmask undetectable facets of a signal Gradually more powerful transforms have been introduced to obtainthe signal properties in the specified time or space coordinated Wavelet transform is one such transform Design and implementation of transforms due to their vast applications are necessary The bottlenecks oftheir design are more pronounced when it comes to the real time properties and resource utilization rate of atransform Contourlet transform CT is a powerful and contemporary tool in extracting vital information from animage It is composed of two stages of Laplacian Pyramid LP and Directional Filter Bank DFB In thefirst stage an input image is delivered to LP and then low and high frequency coefficients are hierarchicallycalculated LP is composed of decimation and interpolation parts Input image is given to the decimation partwhich produces the low frequency coefficients Subsequently the resultant coefficients are processed by theinterpolation part and an estimated version of the input image is calculated Afterward the high frequencycoefficients are obtained by subtracting the estimated image from the original one Quantization analysis is apowerful method to determine the width of the registers and FIFO cells which consume a large quantity offlip flops In an FPGA based design the need for large number of flip flops leads to the occupation of manylogic elements and large amount of power dissipation Also the aforementioned method ascertains themathematical accuracy of outputs For this reason we start with the quantization of the filter coefficients ofthe decimation part and keep the rest of the stages in an ideal form Under these circumstances we use MSE to test the quantization of the low frequency coefficients Then the proper number of bits for a desired MSEcan be figured out After the quantization of the decimation coefficients we can go to the interpolation part inthe same way In previous researches that are available in the literature there are some major drawbackswhich cause some computational redundancy Therefore in this thesis a new implementation of theLaplacian Pyramid LP algorithm is proposed which uses the polyphase representation and the nobleidentities These are implemented by a new pipeline architecture Our approach saves a large number ofmathematical operations and results in the reduction of power consumption Furthermore the proposedarchitecture decreases the number of employed resources as compared with the existing designs Theimplementation results reveal the correct functionality of the proposed architecture In the second stage of the design the high frequency coefficients of the LP stage are analyzed in DFB toshow different directionalities in the frequency domain Until now based on our searches there is nohardware implementation of CT Therefore the final section of the thesis is devoted to the design of the DFBand the implementation of it in a hardware architecture The complexity of DFB affects the real timeperformance of the final design Therefore some considerations have been applied to reach the goal of realtime realization For this propose we have replaced the 2 D separable convolution by a 2 D inseparable one This modification causes an increase in the number of multipliers in comparison to primary design Therefore three structures are proposed to decrease the number of multipl

زين العابدين، محمد علي

طراحي و پياده سازي سخت افزاري تبديل Contourlet

تبديل CT , الگوريت هرم لاپلاسي , بانك فيلتر جهت دار , منابع مورد نياز , FPGA