Title :
Digital VLSI chip design with Cadence and Synopsys CAD tools
Author Statement :
Erik Brunvand
Publication :
Boston Addison-Wesley
Collation :
374 p. : ill. ; 24 cm.
Notes :
Introduction -- Cadence DFII and ICFB -- Composer schematic capture -- Verilog simulation -- Virtuoso layout editor -- Standard cell design template -- Spectre analog simulator -- Cell characterization -- Verilog synthesis -- Abstract generation -- SOC encounter place and route -- Chip assembly -- Design example -- Appendix A: Tool and setup scripts -- Appendix B: Scripts to drive the tools -- Appendix C: Technology and cell libraries
Subject :
Integrated circuits --Very large scale integration Computer-aided design , Entwurfsautomation , VLSI
وارد کنندة اطلاعات :
ghasemi
تاريخ ورود اطلاعات :
1393/07/05
